PCIe 5.0, 4.0, 3.1/3.0 Multi-Host Switch IP Core with NTB Supporting up to 32 Hosts, 32 Devices

XpressSWITCH-NTB is a fully configurable Multi-Host Switch IP for PCIe designed for ASIC and FPGA implementations that enables high-performance communication between multiple PCIe Hosts and one or more PCIe Devices. XpressSWITCH-NTB integrates a transparent switch that allows a Primary Host to configure the PCIe hierarchy and communicate with attached devices in a transparent fashion; it also integrates Non-Transparent Bridges (NTB) that allow additional Guest Hosts to communicate with each other, with the Primary Host, and with any device in the Primary Host domain. XpressSWITCH-NTB is provided with a Linux NTB device driver that implements the mechanisms for Guest Host communication. By implementing XpressSWITCH-NTB into their SoCs, designers have a flexible, configurable, low latency IP solution for connecting multiple PCIe Hosts to multiple PCIe Devices. 

  • Xilinx UltraScale+ series: up to Gen4 x8 or Gen3 x16 on each port
  • Altera 10 series (Arria, Stratix): up to Gen4 x8 or Gen3 x16 on each port
  • Older device families (ex. Altera V-series, Xilinx 7-series) can be supported upon request

Note that the number of ports that can be implemented on FPGA is limited by the number of transceivers/quads available on the targeted device.

Contact us for IP availability.

  • Up to 32 Hosts (1 Primary, 31 Guests)
  • Up to 32 downstream Devices
    • Limited to 31 if Hot Plug is enabled
  • Any Host to any Device communication
    • Main Host via transparent Switch
    • Guest Hosts via NTB+Switch
  • Host to Host communication
    • Via buffered messaging
    • Via direct Address Translation
  • P2P between Endpoint Devices
    • Under Main Host supervision
  • NTB engine includes:
    • 2 doorbell registers
    • 8 scratchpad registers
    • 2KB of inbound message space
    • 2KB of outbound message space
    • 16 Address Translation Tables (ATL)
  • All ports PCIe 5.0 compliant
    • PIPE interface exposed for each port
    • Each port can be configured with its own link width/speed

  • Self-contained implementation does not require any external "Control Host" or "Fabric Manager", limiting complexity and reducing point of failures
  • Full RTL logic implementation without the use of embedded CPU for simplified implementation and optimal performance
  • NTB driver provided for easy Linux integration