PCIe 4.0 Host Enabling Reference Platform for Prototyping & Development of PCIe 4.0 Devices and Applications
PLDA Gen4HOST provides a platform for prototyping and developing PCIe 4.0 hardware and software. At the core of Gen4HOST is PLDA's PCI-SIG compliant XpressSWITCH switch IP for PCIe 4.0 technology running on a Xilinx® Virtex® UltraScale+™ FPGA. Gen4HOST provides a PCIe 3.0 x16 (upstream) to PCIe 4.0 x8 (downstream) integration backplane for development and validation of PCIe 4.0 endpoints, and is also available in a reversed configuration (PCIe 4.0 upstream, PCIe 3.0 downstream) for development and validation of PCIe 4.0 Hosts and Root Complexes. By working with Gen4HOST, early developers of PCIe 4.0 devices can accelerate their software, firmware, and hardware developments, in their production environment, using the Operating System of their choosing.
PCIe 4.0 NVMe SSD and other endpoint device testing
- Silicon validation engineers can test their PCIe 4.0 SSDs on a poduction PC/server running O/S provided drivers with open-source software, or any proprietary drivers and software
- Software engineers can develop and test their proprietary SSD drivers or software on the production PC/server
Gen4HOST is based on a Xilinx Virtex UltraScale+ XCVU3P-2FFVC1517E FPGA and features:
- One PCIe x16* electrical, PCIe x16 mechanical upstream port
- One PCIe x8* electrical, PCIe x16 mechanical downstream port
The FPGA design implements PLDA XpressSwitch IP with the following characteristics:
- 1 PCIe 3.0 x16* upstream port to be connected to a Gen3 capable computer slot
- 1 PCIe 4.0 x8* downstream port for connecting an external device (DUT)
* See Product Versions section for detail.
- Ready to use Gen4HOST Platform (pre-loaded firmware)
- Technical support and maintenance updates
|Model||Upstream PCIe||Downstream PCIe|
|31648||Gen3 x16||Gen4 x8|