SAN MATEO, Calif., Nov. 26, 2018 -- SiFive, the leading provider of commercial RISC-V processor IP, today announced that PLDA, the leader in PCIe and CCIX Controller IP solutions has joined the DesignShare™ ecosystem. Through this collaboration, PLDA will provide its rich suite of XpressRICH core IP that enables high-speed connectivity solutions for many applications like enterprise storage, networking, high-performance computing and artificial intelligence to name a few.
As cloud computing and deep learning accelerators drive faster advances in the PCIe roadmap, existing hardware designs cannot support the higher speed signals over the same distances. The PCIe 1.0 specification allowed signals to travel as much as 20 inches over traces in mainstream FR4 boards, even while passing through two connectors. In contrast, today’s quicker 16 GT/s PCIe 4.0 signals will peter out in under six inches and without going over any connectors.
PLDA and MegaChips announce a cooperation to design PCIe controllers and PCIe PHY IP on TSMC’s 16nm Process Technology
The combination of PLDA’s PCIe controller and MegaChips’ PHY will deliver a complete PCIe subsystem solution.
PLDA, the industry leader in PCI Express® IP solutions and MegaChips, a global semiconductor company specializing in ASIC Solution Services, today announced their collaboration to design a combined PCIe Controller IP and PHY IP solution. While the combination is currently targeting the TSMC 16nm process, the PCIe Controller/PHY solution will be easy to port to additional fabs and processes.
PLDA Announces Industry’s First Controller for FPGA supporting PCIe® 4.0 v0.9, Allowing immediate PCIe 4.0 implementation into FPGAs
SAN JOSE, Calif., September 11, 2017 -- PLDA, the industry leader in PCI Express® interface IP solutions, today announced the availability of the industry’s first PCIe soft IP solutions to support PCIe® 4.0, rev 0.9 on FPGA. PLDA’s XpressRICH4™ and XpressRICH4-AXI™ IP solutions bring a track record of proven reliability, with many ASICs and SoCs already in production.
PLDA PCIe 4.0 soft IP solutions now support the latest features made mandatory as part of the PCIe 4.0 Specification, including support of EIEOS.
Silicon-proven sub-system enables easy integration with pre-validated PHY, Controller and Verification IP
PLDA and GUC Delivers Fully Integrated PCI Express Gen 4 Solution for TSMC’s 16nm FinFET Plus Process
PCIe 4.0 Controller and PHY Provide Complete IP Solution Enabling Early Adopters of the Emerging PCIe 4.0 Specification to Accelerate Product Development and Reduce Integration Risk. See a demonstration at The TSMC Symposium in San Jose on April 7th.
Using the same silicon-proven IP found in PLDA’s XpressRICH3 product, PLDA’s PCIe 4.0 controller IP and Bus Functional Model (BFM) enable SoC and ASIC designers to quickly incorporate PCIe 4.0. PLDA provides testing and integration with third party PHYs, delivering a complete and flexible PCIe 4.0 solution.
PCIe 4.0 is the next evolution of the widely implemented PCI Express I/O specification. At 16Gbps, the interconnect performance bandwidth will be doubled over the current PCIe 3.0 specification, while preserving compatibility with software and mechanical interfaces.
PLDA PCIe 4.0 Benefits