PLDA Announces Availability of XpressRICH5™ PCIe 5.0 Controller IP

PLDA, the industry leader in PCI Express® interface IP solutions, today announced availability of their XpressRICH5™ PCIe® 5.0 Controller IP.  PLDA’s XpressRICH5 supports rev. 0.7 of the PCIe 5.0 Specification and is available for ASIC, SoC and FPGA implementation, allowing early adopters to seamlessly improve their link throughtput to 32 GT/s per lane and reduce their overall latency. This level of performance is highly anticipated by developers of  leading edge applications in Artificial Intelligence (AI) and Machine Learning (ML), data center storage and networking, and High Performance Computing (HPC).  

PCI-SIG® Fast Tracks Evolution to 32GT/s with PCI Express 5.0 Architecture

PCI-SIG Developers Conference 2017, Santa Clara, CA. – June 7, 2017 - PCI-SIG®, the organization responsible for the widely adopted PCI Express® (PCIe®) industry-standard input/output (I/O) technology, today announced 32GT/s as the next progression in speed for the PCIe 5.0 architecture, targeting high-performance applications such as artificial intelligence, machine learning, gaming, visual computing, storage and networking.

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