PCIe 4.0 Communication over Optical Fiber and TWINAX Cables

As cloud computing and deep learning accelerators drive faster advances in the PCIe roadmap, existing hardware designs cannot support the higher speed signals over the same distances. The PCIe 1.0 specification allowed signals to travel as much as 20 inches over traces in mainstream FR4 boards, even while passing through two connectors. In contrast, today’s quicker 16 GT/s PCIe 4.0 signals will peter out in under six inches and without going over any connectors.

 

 

PLDA and MegaChips announce a cooperation to design PCIe controllers and PCIe PHY IP on TSMC’s 16nm Process Technology

The combination of PLDA’s PCIe controller and MegaChips’ PHY will deliver a complete PCIe subsystem solution.

PLDA, the industry leader in PCI Express® IP solutions and MegaChips, a global semiconductor company specializing in ASIC Solution Services, today announced their collaboration to design a combined PCIe Controller IP and PHY IP solution. While the combination is currently targeting the TSMC 16nm process, the PCIe Controller/PHY solution will be easy to port to additional fabs and processes.

PLDA Solutions for Test and Validation of PCIe 4.0 Devices

In addition to their core business of licensing PCIe semiconductor IP, PLDA has a long history of robust hardware designs. PLDA initially built its first PCIe 4.0 platform, Gen4SWITCH, as a way to demonstrate the PCIe 4.0 technology and to test designs at PCIe 4.0 speed for its own needs. Widely used during tradeshows and at PCI-SIG workshops as an early PCIe 4.0 host platform, Gen4SWITCH has become a star product in high demand, and has spawned a complete Test and Validation product line, targeted specifically at the needs of PCIe 4.0 SoC designers and system vendors.

 

PLDA Announces Industry’s First Controller for FPGA supporting PCIe® 4.0 v0.9, Allowing immediate PCIe 4.0 implementation into FPGAs

SAN JOSE, Calif., September 11, 2017 -- PLDA, the industry leader in PCI Express® interface IP solutions, today announced the availability of the industry’s first PCIe soft IP solutions to support PCIe® 4.0, rev 0.9 on FPGA. PLDA’s XpressRICH4™ and XpressRICH4-AXI™ IP solutions bring a track record of proven reliability, with many ASICs and SoCs already in production.  
 
PLDA PCIe 4.0 soft IP solutions now support the latest features made mandatory as part of the PCIe 4.0 Specification, including support of EIEOS.

PLDA Announces XpressRICH4-AXI™ PCIe® 4.0 IP, Providing a High Performance and Reliable AXI Bridge for SoC designs

The newest addition to PLDA’s extensive line of advanced PCIe products provides the highest level of PCIe-to-AXI integration, preventing AXI deadlock with ordering rules management, while delivering full PCIe 4.0 performance in an AXI subsystem

SAN JOSE, Calif., March 13, 2017 -- PLDA, the industry leader in PCI Express® interface IP solutions, today announced their XpressRICH4-AXI™ PCIe® 4.0 IP, providing the industry’s best solution for integrating AXI and PCIe blocks.

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