Inspector

PLDA’s INSPECTOR diagnostic and debug tool for PCIe 4.0 ​that successfully passed the PCIe 4.0 PCI-SIG compliance has two new major features:

• Analog monitoring: The Inspector V2.2 allows now to measure in live the DUT power consumption (3.3V / 12V) and the Inspector temperature. These indications are displayed using dynamic and easily readable charts. This can help SDDs vendors to quickly characterize the impact of PCI-Express low power modes or high throughputs for example.

PLDA’s INSPECTOR diagnostic and debug tool for PCIe 4.0 passed all Gold and Interoperability tests for systems with CEM slots

PLDA, the industry leader in PCI Express® (PCIe®) technology and high-speed interconnect solutions, today announced that their PCIe 4.0 INSPECTOR™ diagnostic and debug platform passed all Gold and Interoperability tests for the PCIe 4.0 root port systems performed by the PCI-SIG® during their Compliance Workshop, held in October 2019 in Taiwan.

PCIe Device links as expected (L0 in x8-Gen4) but is not detected by the system

Discover how Inspector can be used all along your hardware validation cycle

In addition to their core business of licensing PCIe semiconductor IP, PLDA has a long history of robust hardware designs. PLDA initially built its first PCIe 4.0 platform, Gen4SWITCH, as a way to demonstrate the PCIe 4.0 technology and to test designs at PCIe 4.0 speed for its own needs. Widely used during tradeshows and at PCI-SIG workshops as an early PCIe 4.0 host platform, Gen4SWITCH has become a star product in high demand, and has spawned a complete Test and Validation product line, targeted specifically at the needs of PCIe 4.0 SoC designers and system vendors.

PLDA has leveraged their extensive PCIe expertise to provide a comprehensive suite of Test and Validation solutions for the PCI Express protocol, enabling faster and more affordable validation of PCIe silicon and devices

Check the video demonstration of Inspector.

Inspector is a PCI Express 4.0 Host Platform for diagnostic and performance tuning of PCIe 4.0 silicon, devices,and software.

• Diagnose PHY and link issues pre-L0 and post-L0
• Test your lane margining circuitry
• Verify and tune the performance of your PCIe 4.0 devices in a x86 environment
• Develop and test your application software on an early PCIe 4.0 x86 platform

Debugging issues in a PCIe system is often challenging and time consuming. PCIe Express is a complex protocol with little or no visibility on problems that have a long-term impact.

PLDA is releasing a series of tutorials that explains the role of each debug tool and method in troubleshooting issues, with simple tips and use cases.