PCI-SIG Developers Conference 2017, Santa Clara, CA. – June 7, 2017 - PCI-SIG®, the organization responsible for the widely adopted PCI Express® (PCIe®) industry-standard input/output (I/O) technology, today announced 32GT/s as the next progression in speed for the PCIe 5.0 architecture, targeting high-performance applications such as artificial intelligence, machine learning, gaming, visual computing, storage and networking.
PLDA at the Epicenter of PCIe® 4.0 Wave of Adoption with Recent PCIe Design Conference Achievements and Testing Success for PLDA’s Gen4SWITCH™
PLDA’s complete line of PCIe 4.0 products to be exhibited at the upcoming PCI-SIG® Developer’s Conference in Santa Clara, CA on June 7-8, 2017.
“Inspector” – An Evolution of the PCI Express 4.0 PDK That Enables PCIe 4.0 Technology Design Validation and Performance Optimization Today
PLDA, the industry leader in PCI Express® (PCIe®) interface IP solutions, today announced the release of its "Inspector", a Plug & Play PCIe 4.0 host platform with built-in PCIe traffic monitoring, enabling link-training and link performance analysis.
Silicon-proven sub-system enables easy integration with pre-validated PHY, Controller and Verification IP
Announcement highlights a growing trend for designers to move from ASSP to PCIe-embedded Switch IPs in their chip designs.
SAN JOSE, Calif., March 27, 2017 -- PLDA, the industry leader in PCI Express® interface IP solutions, today announced a series of major licenses for their XpressSWITCH™ PCIe switch IP, confirming the expansion of PCIe-embedded switches. These licenses enable several major SoC and system vendors to solve their cost, flexibility, integration, and end-of-life issues by integrating a PLDA sub-system IP instead of an off-the-shelf ASSP.
We are pleased to invite you to the first PLDA Design Days in Shanghai. PLDA and their partners will share their experience and expertise with PCIe designers in Shanghai during an event 100% focused on PCIe 4.0 technology.
This free event is designed to provide engineers with an overview of best practices for designing a PCIe 4.0 capable silicon chip from spec to tape-out.
REGISTRATION IS CLOSED
For additional information about the PLDA Design Days, please send us an email.
PLDA Announces XpressRICH4-AXI™ PCIe® 4.0 IP, Providing a High Performance and Reliable AXI Bridge for SoC designs
The newest addition to PLDA’s extensive line of advanced PCIe products provides the highest level of PCIe-to-AXI integration, preventing AXI deadlock with ordering rules management, while delivering full PCIe 4.0 performance in an AXI subsystem
SAN JOSE, Calif., March 13, 2017 -- PLDA, the industry leader in PCI Express® interface IP solutions, today announced their XpressRICH4-AXI™ PCIe® 4.0 IP, providing the industry’s best solution for integrating AXI and PCIe blocks.
Samtec FireFly™ PCIe® Optical Flyover Cable Assembly Fully Supports PCIe 4.0
PCUO Series Featured in PLDA PCIe 4.0 Platform Development Kit (PDK)
PLDA, the industry leader in PCI Express® interface IP solutions, today announced a full set of solutions allowing designers to create products optimized for PCIe® 4.0 now. PCIe 4.0 motherboards are not expected to be obtainable until 2017, but when they become available, the market will expect access to applications and components that can take advantage of PCIe 4.0’s speed and agility. By helping with project solutions now, PLDA enables designers to take advantage of the PCIe 4.0 market with less design lag.
The race to launch devices supporting PCIe 4.0 started several months back. Designers face several challenges to release the product on D-Day: