Sofia, Bulgaria - Full-time

About PLDA

PLDA is a developer and licensor of Semiconductor Intellectual Property (SIP) specializing in high-speed interconnect supporting multi-gigabit rates (2.5G, 5G, 8G, 16G, 25G, 32G, 56G, 112G), and protocols such as PCI Express, CCIX, CXL, and Gen-Z. PLDA has established itself as a leader in that space with over 3,200 customers and 6,400 licenses in 62 countries. PLDA is a global technology company with offices in Silicon Valley, France, Bulgaria, Taiwan, and China.

Your Mission

You will join the AD&I team under the responsibility of the Director of Engineering and Verification Team Leader, your mission will be to:

• RTL design using Verilog
• PCIe core and PHY integration
• IPs verification using UVM methodology
• Test cases development
• Support worldwide customers on the IP integration
• Track and maintain your productivity metrics
• Reporting periodically on progress & difficulties

Skills Requirement

• Verilog, System Verilog
• Verification EDA tools, Verification methodologies, Verification IPs
• Data management and version control systems
• Automation servers and continuous integration
• Proficiency in programming and/or scripting languages (Python, Cshell…)
• Background in digital circuitry or hardware logic design

Your Profile

• Bachelor or Master’s degree in Electronics Engineering, Computer Science, etc.
• Positive and self-driven person with a “Can Do” Attitude
• Strong analytical and problem solving skills
• Excellent interpersonal skills
• Open for traveling abroad
• Capable to handle calls with customers.
• Work in international organization and specially with teams in France, ASIA & USA
• A very good English

We wish 2-5 years of experience:

• Experience in ASIC or FPGA Design
• Experience in Verilog/System Verilog
• Experience with versification environments (UVM,OVM...)