In support of immediate Gen-Z development, PLDA has released a detailed datasheet enabling designers to begin architecting and designing Gen-Z enabled SoCs. This PLDA Gen-Z IP datasheet includes the key information required for initial design including supporting features, interface description and micro architecture, gate count, performance metrics, and more.
Computer systems as we know them have been built on the paradigm that the CPU-memory pair is fast while network and storage are slow. Over the years, these components developed their own language and interfaces that require layers of software to translate memory commands into network and storage commands and vice versa.
Until now, the speed of the CPU-memory pair relative to network and storage I/O was such that these software layers had minimal impact on system performance.
However, with Moore’s law in full effect, network and storage technologies are quickly catching up with CPU-memory speeds and the burden of generations of software layers now becomes significant.