PCIe 4.0 Communication over Optical Fiber and TWINAX Cables

As cloud computing and deep learning accelerators drive faster advances in the PCIe roadmap, existing hardware designs cannot support the higher speed signals over the same distances. The PCIe 1.0 specification allowed signals to travel as much as 20 inches over traces in mainstream FR4 boards, even while passing through two connectors. In contrast, today’s quicker 16 GT/s PCIe 4.0 signals will peter out in under six inches and without going over any connectors.

 

 

PLDA PCIe Experts since 1996

PLDA has been successfully delivering PCI and PCI Express IP for more than 20 years.

With over 6,200 licenses, PLDA has established a vast customer base and the world’s broadest PCIe ecosystem. PLDA has maintained its leadership over four generations of PCI Express specifications, enabling customers to reduce risk and accelerate time to market for their ASIC and FPGA based designs. PLDA provides a complete PCIe solution with its IP cores, FPGA boards for ASIC prototyping, PCIe BFM/testbenches, PCIe drivers, and APIs.

PLDA is a global company with offices in North America (San Jose, California), Europe (France, Italy, and Bulgaria), and Asia (China, Taiwan).

 

 

 

PLDA Solutions for Test and Validation of PCIe 4.0 Devices

In addition to their core business of licensing PCIe semiconductor IP, PLDA has a long history of robust hardware designs. PLDA initially built its first PCIe 4.0 platform, Gen4SWITCH, as a way to demonstrate the PCIe 4.0 technology and to test designs at PCIe 4.0 speed for its own needs. Widely used during tradeshows and at PCI-SIG workshops as an early PCIe 4.0 host platform, Gen4SWITCH has become a star product in high demand, and has spawned a complete Test and Validation product line, targeted specifically at the needs of PCIe 4.0 SoC designers and system vendors.

 

Inspector for PCIe 4.0 Product Demonstration

Check the video demonstration of Inspector.

Inspector is a PCI Express 4.0 Host Platform for diagnostic and performance tuning of PCIe 4.0 silicon, devices,and software.

  • Diagnose PHY and link issues pre-L0 and post-L0
  • Test your lane margining circuitry
  • Verify and tune the performance of your PCIe 4.0 devices in a x86 environment
  • Develop and test your application software on an early PCIe 4.0 x86 platform

 

 

PCIe Debugging Tutorials (Ep4)

Debugging issues in a PCIe system is often challenging and time consuming. PCIe Express is a complex protocol with little or no visibility on problems that have a long-term impact.

PLDA is releasing a series of tutorials that explains the role of each debug tool and method in troubleshooting issues, with simple tips and use cases.

 

 

PCIe Debugging Tutorials (Ep3)

Debugging issues in a PCIe system is often challenging and time consuming. PCIe Express is a complex protocol with little or no visibility on problems that have a long-term impact.

PLDA is releasing a series of tutorials that explains the role of each debug tool and method in troubleshooting issues, with simple tips and use cases.

 

 

PCIe Debugging Tutorials (Ep2)

Debugging issues in a PCIe system is often challenging and time consuming. PCIe Express is a complex protocol with little or no visibility on problems that have a long-term impact.

PLDA is releasing a series of tutorials that explains the role of each debug tool and method in troubleshooting issues, with simple tips and use cases.

 

 

PCIe Debugging Tutorials (Ep1)

Debugging issues in a PCIe system is often challenging and time consuming. PCIe Express is a complex protocol with little or no visibility on problems that have a long-term impact.

PLDA is releasing a series of tutorials that explains the role of each debug tool and method in troubleshooting issues, with simple tips and use cases.

 

 

PCIe Switch IP Presentation and Demo

 

PLDA Switch IP for PCIe is a customizable and scalable switch design intended to be embedded into ASIC, SoC, and FPGA. PCIe® architecture has become a standard in the enterprise space due to the advantages it provides in term of performance and reliability. Embedding a configurable PCIe switch IP into chip designs provides developers with extra flexibility, scalability and reliability when interconnecting multiple PCIe devices, with significant gains in term of latency and power consumption compared to ASSP solutions.

Empower Virtualization with SR-IOV by PLDA

PLDA announces enhanced SR-IOV support in their XpressRICH3 PCI Express Gen3 IP Solution, providing up to 512 virtual functions on a single PCIe instance. PLDA’s SR-IOV solution accelerates development of virtualized applications through use of an industry standard, easy-to-configure PCI Express interface.

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