PLDA, the industry leader in PCI Express® IP solutions and GUC, the Flexible ASIC LeaderTM , today announced successful test chips for the industry’s first combined PCIe Gen 3 Controller IP and PHY IP solution on TSMC 28nm HPM (High Performance Mobile) process. The combined PCIe 3.0 Controller/PHY solution is in initial production and has been incorporated into demo boards.
The TSMC 28nm HPM process offers significantly higher speeds, up to 40 percent lower power and better gate density compared to the 40nm node and is optimized for the requirements of high performance mobile devices. The ability to easily integrate a complete PCIe Gen 3 solution into end products is a significant milestone for developers of next generation mobile devices.
The PLDA XpressRICH3 IP is a high performance, low latency, highly-configurable PCI Express Endpoint, Root port, and Switch IP, compliant to the PCI Express rev.3.0 specification. It is also available with the industry-standard AMBA AXI4 interface under the version XpressRICH3-AXI.
Evaluation boards with a single chip with PLDA’s PCIe 3.0 Controller and GUC’s PCIe 3.0 PHY combination are available for review now. To request an evaluation board, please contact PLDA to request an evaluation.