PLDA, the industry leader in high-speed interconnect solutions, today announced their CXL™ Verification IP Ecosystem which includes IP from partners Truechip and Avery Design Systems, who are pioneering CXL design verification. Compute Express Link™ (CXL) is an open industry standard interconnect that builds on PCI Express 5.0’s infrastructure to reduce complexity and system cost while increasing performance. PLDA’s CXL Verification IP Ecosystem is intended to reduce the challenges of designing new CXL applications. By combining leading third-party VIP and PLDA’s best-in-class CXL controller IP, CXL designers will have the ability to choose the most flexible and complete solution for their SoC designs, eliminating reliance on single-source suppliers – an essential step to reducing design risk.
PLDA, the industry leader in high-speed interconnect solutions, today announced that PLDA’s industry-leading XpressLINK-SOC™ CXL IP provides full support for the AMBA® CXS Issue B (CXS-B) interface protocol. This support enables SoC designers to reduce latency and more easily implement the CXL and CCIX multichip interconnect standards in their Arm®-based System-on Chip (SoC) solutions.
AMBA CXS is a credit-based streaming protocol that enables high-bandwidth transmission of packets between a user application and the protocol controller. Using a CXS interface, the designer can bypass the controller’s transaction layer, which can significantly reduce latency. The CXS specification defines the interface between an on-chip interconnect, such as the Arm CoreLink™ Coherent Mesh Network, and a PCIe or CXL controller to optimize transport of CCIX and CXL packets.
PLDA Announces the Successful CXL™ Interoperability with pre-production Intel Xeon CPU, Code Named Sapphire Rapids
PLDA XpressLINK™ CXL Controller IP combines the industry’s lowest latency implementation with an easy-to-integrate design, accelerating adoption of CXL in SoC designs.
PLDA, the industry leader in high-speed interconnect solutions, today announced the successful CXL™ interoperability with pre-production Intel Xeon processors code named Sapphire Rapids. The session was conducted at Intel’s Industry Enabling Labs as part of a long-term collaboration between PLDA and Intel’s industry enabling group. It resulted in demonstrated interoperability between PLDA’s XpressLINK™ CXL IP, running on a PLDA FPGA-based add-in card, and Intel’s development platform equipped with pre-production “Sapphire Rapids” processors.
PLDA, the industry leader in high-speed Interconnect solutions, today announced CXL 2.0 support for its XpressLINK™ and XpressLINK-SOC™ CXL IP solutions. Compute Express Link™ (CXL) is an open industry interconnect standard that builds on PCI Express® 5.0 infrastructure to enable memory coherency and low latency between processors and accelerators. The CXL 2.0 specification introduces additional functionality including first level switching, memory pooling and sharing, and Hot Plug, which aim to deliver important benefits for hyperconverged datacenter and HPC applications.
PLDA’s long track record of PCIe® innovation and success has given them an edge in CXL development, and their XpressLINK CXL IP is available now for integration into cutting-edge designs. Key features of PLDA XpressLINK CXL IP include:
PLDA XpressSWITCH IP passed all Gold and Interoperability tests as a Switch Component at PCIe 4.0 architecture speed (16 GT/s)
XpressSWITCH™ IP is the Industry’s first switch Soft IP (SIP) to pass all Gold and Interoperability tests at the PCI-SIG® Compliance Workshop 115, held online in October 2020. The testing was conducted using PLDA XpressSWITCH IP for the PCI Express® (PCIe®) 4.0 specification, running on a FPGA based add-in card with both upstream and downstream ports operating at 16 GT/s.
PLDA® Announces Robust Verification Toolset, Increasing Design Accuracy and Reducing Time-to-Production for Next Generation SoCs with CXL®, PCIe® 6.0 or Gen-Z® Interconnect
PLDA, the industry leader in PCI Express® IP and data interconnect solutions, today announced the Robust Verification Toolset, a breakthrough approach to IP verification dramatically increasing Design accuracy and speeding-up the time-to-market. The verification process for IP design takes place at the front end of chip design and requires a high level of reliability to prevent production delays. Achieving the necessary levels of verification can be time-consuming, however cutting corners in verification often results in costly and difficult bug fixes at the end of chip fabrication.
Following the recent Announcement of MoU between the CXL Consortium™ and the Gen-Z Consortium™, PLDA Launches their XpressLINK™ CXL IP, providing an immediate Compute Express Link solution for SoC developers
100% of PLDA employees in Aix-en-Provence, Hsinchu, San Jose, Shanghai and Sofia are fully operational and are working remotely. For some activities that sometimes require an absolute presence at the office, such as administration and laboratory tasks, strict rules have been put in place to keep PLDA’s collaborators safe, along with their families and other people from our communities.
PLDA’s controller IP with AXI interconnect passed all Gold and Interoperability tests as an endpoint device at PCIe® 4.0 architecture speed (16 GT/s)
PLDA, the industry leader in PCI Express® (PCIe®) IP and data interconnect solutions, today announced that their XpressRICH-AXI™ PCIe Controller IP passed all Gold and Interoperability tests at the PCI-SIG® Compliance Workshop, held in December 2019 in Burlingame, CA. PLDA’s XpressRICH-AXI Controller IP for the PCIe 4.0 specification was tested running on an FPGA based add-in card Gen4ENDPOINT.
PLDA Announces Augmented Presence in Asia with Increased R&D, Support and Sales, and a New Chinese Language Website
PLDA, the industry leader in PCI Express® and high-speed interconnect solutions, today announced an augmented presence in the APAC region, focused on expanding their R&D, Sales and Support staff, and on the launch of a new, Chinese-language version of the PLDA website.
According to market research firm IC Insights, fabless chip companies based in China accounted for 13% of the world’s $109.4 billion in 2018 IC sales, up from 5% in 2010, while Taiwan was maintaining 2nd place on the IC sales rankings with 16% of fabless revenue in 2018. In addition, China and the APAC region manufactures 80% of the world’s PCIe based products. It makes obvious sense, therefore, for PLDA to enhance its presence in the region.