PCI-SIG DEVCON TAIWAN 2018
The Westin Taipei - October 22-23
Come meet the PLDA Team at PCI-SIG Developers Conference Taipei 2018 !
Focusing on the most up-to-date PCIe technology, PCI-SIG DevCon 2018 is the only event in Israel that provides comprehensive training on all aspects of PCIe technology.
This free event provides a great opportunity for you to discover our latest PCIe solutions, such as:
INSPECTOR FOR PCIe
Don't miss PLDA's INSPECTOR demonstration
INSPECTOR is an interposer module designed for non-intrusive monitoring, diagnostic, exercizing and debug of PCIe devices. It uses transparent switching technology to connect on the upstream side to a PCIe host platform, and on the downstream side to the device under test (DUT). INSPECTOR supports PCIe 1.x, 2.x, 3.x, and 4.0 interfaces on either ports, and up to 8 lanes (x8)
IMPLEMENTING LANE MARGINING IN A HETEROGENEOUS SYSTEM
On Tuesday, October 23, from 9:00 am to 10:00 am, senior PLDA field engineer, Rex Yu, will give a presentation on Implementing Lane Margining in a Heterogeneous System.
The increasing data throughput enabled by the PCIe 4.0 and PCIe 5.0 specifications can lead to signal integrity degradation, which means measuring the link quality between system devices becomes crucial.
To address this issue, the PCIe 4.0 specification has included a new mandatory feature: Lane Margining. This feature makes it possible to obtain the electrical margin of each Receiver on a Link directly from the data stream.
However, depending on the system configuration, implementing Lane Margining can be quite complex. In this presentation, Trupti explores the challenges faced and questions raised in implementing lane margining in any configuration.
Let's discuss your projects and issues on PLDA's booth !
We will be happy to introduce our products and share our knowledge.
Interested ? Go to the Online Attendee Free Registration