Webinar: "Preparing for PCIe 6.0"

 

As the need for data has exploded driven by applications like AI/ML and automotive, the semiconductor industry, led by PCI-SIG, is preparing for the final release of the PCIe 6.0 specification and all the changes it entails.

In this first of two joint webinars, PLDA and Siemens EDA join to introduce you to PCIe 6.0, including architecture differences from prior generations, performance improvements, and how PCIe 6.0 compares from both a designer and verification perspective.

What you will learn:

- what is PCIE 6.0
- how does it differ from past generations
- design considerations when planning with PCIe 6
- verification implications of a PCIe 6 design

Come and Meet PLDA at TSMC Symposium !

 

Come and Meet PLDA at TSMC Symposium

PLDA is a developer and licensor of Semiconductor Intellectual Property (SIP) specializing in high-speed interconnect supporting multi-gigabit rates (2.5G, 5G, 8G, 16G, 25G, 32G, 64G), and protocols such as PCI Express, CCIX, and CXL.

TSMC customers and partners will gather together at the 2021 TSMC Virtual Technology Symposium.

Join PLDA for the following sessions:

Come and meet PLDA at PCI-SIG Developers Conference

 

PCI-SIG Developers Conference - May 25th/26th - Virtual Conference

PLDA is a proud sponsor of the PCI-SIG Virtual DevCon on May 25-26. This is a great opportunity for PCI-SIG members to learn directly from the industry’s PCIe technology experts and gain best practices to improve product roll-out. 

PCI-SIG members can view our live presentation covering “Enabling PCIe 5.0 prototyping and validation with FPGA” on Wednesday, May 26th 10:30 - 11:30 AM (PDT). 

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