NVMe-oF Bridge ASIC
NVMe-oF Bridge ASIC
Overview
The 100G NVMe-oF bridge ASIC is designed specifically to enable NVMe JBOFs to connect directly to an NVMe-oF network, via a standard x16 PCIe slot in a JBOF. The chip is manufactured on TSMC 28 HPC process.
PLDA Inside
The SoC uses PLDA XpressRICH controller IP for PCIe 3.1 as the PCIe interface to the host CPU subsystem. The IP operates as a Gen3 x16 endpoint interface, or can be configured as 2 x Gen3 x8 connections via port bifurcation.
Why PLDA?
PLDA IP was selected based on the following criteria:
- Proven integration with Synopsys PCIe PHY
- Availability of port bifurcation wrappers
- Maturity of PLDA XpressRICH Controller IP for PCIe 3.1