PCI-X - ASIC & Structured ASIC - PLDA

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Home >>Interface IP>>PCI/PCI-X>>ASIC & Structured ASIC>>PCI-X

PCI-XPrint Friendly

Key Benefits

32 and 64-bit PCI-X Master / Target Interface
Supports bus speeds up to 133 MHz
Multi-function Core (up to 2 different functions)
Full support for 64-bit addressing
Built-in support for in-site programming (JTAG interface)

Name	PCI-X IP Core
Version	7.2.0
Description	The PCI-X IP Core provides an integrated solution for interfacing your application with 32-bit and 64-bit PCI peripheral devices.
Function	Bus Interfaces
Target Technologies	ASIC .25u and below Structured ASIC and other masked ICs: contact us
Feature List	PCI-X Specification 1.0b (2.0 mode 1) compliant PCI Specification 3.0 compliant Master/Target 32/64 bit – 133Mhz PCI backward compatible (optional feature) Demonstrated 840 MB/sec sustained transfer rate @ 133MHz Multi-function support (2 functions) Up to 6 BARs plus expansion ROM 4KB burst memory and I/O transfers with zero wait-state Up to 4 integrated DMA channels External DMA interface for custom DMA engine Support for 32 outstanding split requests Scatter-gather (DMA chaining) support Full power management support
Documentation	Product Brief (May 22, 2007) Reference Manual (May 19, 2008) Testbench Reference Manual (May 19, 2008) Getting Started: ASIC (May 19, 2008) Build History (May 19, 2008)

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