PLDA AMBA 2 AHB to USB 3.0 Host is a high performance, low gate count, highly configurable xHCI compliant semiconductor IP designed to add SuperSpeed USB host connectivity to a SoC's AMBA AHB system bus. The controller implements all of the digital layers defined by the USB 3.0 Specification is full backward compatible with USB 2.0.

What's unique about our IP?

• Free Testbench is provided
• Guaranties seamless integration with a wide range of USB 3.0 PHY IP.
• Reference designs to get you started and allow you to prototype all or part of your ASIC/SoC. Check out our FPGA Design Kits section.
• We offer professional services to quickly and reliably customize our IP to fit any specific requirement.
• Our IP customization GUI (Wizard)
  
• Free evaluation program that includes the same deliverables and technical support as the licensed IP.
• The IP comes with our industry acclaimed technical support provided by the IP team.

IP Features and Deliverables

• AMBA AHB to USB 3.0 Host IP core in synthezisable Verilog RTL source code
  • Includes Physical, Link, and Protocol layers
  • Includes xHCI controller
  • Complies to the USB 3.0 Specification, revision 1.0
  • Full support for USB 2.0
    • With PLDA USB 2.0 Core Layer
    • Or with any USB 2.0 IP through intelligent multiplexing
  • Optional Root Hub available for multi-port implementation
  • Configurable Core frequency: 125, 250, or 500Mhz
  • 32-bit AMBA 2 AHB user interface
    • Compliant to AMBA 2 AHB rev. 2.0 specification
      
    • Includes 1 x AHB master and 1 x AHB slave
    • Asynchronous clocking between Core and AHB interface
      
  • Configurable buffer sizes
  • USB 3.0 PIPE interface to PHY (8-,16-, or 32-bit)
  • Full Power Management support (U1,U2,U3)
    • LFPS support
  • Support Isochronous and Bulk Stream
    
• USB 3.0/2.0 Testbench as compiled simulator libraries
• AMBA AHB to USB 3.0 Host IP simulation models
• Configuration assistant GUI (Wizard)
  • Multi-platform JAVA based
• ASIC synthesis scripts (Synopsys Design Compiler)
• Reference design: PCI Express based USB 3.0 Host Bus Adapter (HBA)
  • Synthesizable Verilog RTL source code
  • Simulation environments and scripts
• Complete documentation

Available Documentation

Document Name	Version
Product Brief	November 13, 2008
Reference Manual	Contact us