PLDA USB 3.0 Device Controller is a high performance, low gate count semiconductor IP designed for SuperSpeed USB device implementations in ASIC and Structured ASIC and engineered for 130 nm process nodes and smaller geometries. The controller implements all of the digital layers defined by the USB 3.0 Specification and is fully backward compatible with USB 2.0. User interfaces options include AMBA 2 AHB, AMBA 3 AXI, and a proprietary high-performance DMA.

What's unique about our IP?

• Guaranties seamless integration with a wide range of USB 3.0 PHY IP.
• Reference designs to get you started and allow you to prototype all or part of your ASIC/SoC. Check out our FPGA Design Kits section.
• IP customization GUI (Wizard)
  
• Free evaluation program that includes the same deliverables and technical support as the licensed IP.
• The IP comes with our industry acclaimed technical support provided by the IP team.
  

IP Features and Deliverables

• USB 3.0 Device IP core in synthezisable Verilog RTL source code
  • Includes Physical, Link, and Protocol layers
  • Includes Device Controller
  • Complies to the USB 3.0 Specification, revision 1.0
  • Full support for legacy USB 2.0
    • With PLDA USB 2.0 Core Layer
    • Or with any USB 2.0 IP through intelligent multiplexing
  • Configurable Core frequency: 125, 250, or 500Mhz
  • Available user interfaces include AMBA 2 AHB, AMBA 3 AXI, and high-performace DMA
  • Asynchronous clocking between Core and user interface logic (CDC)
    
  • Configurable buffer sizes
  • USB 3.0 PIPE interface to PHY (8-,16-, or 32-bit)
  • Full Power Management support (U1,U2,U3)
    • LFPS support
  • Up to 16 IN and OUT endpoints
  • Support Isochronous and Interrupt endpoints
  • Support Bulk Stream
• USB 3.0 Testbench simulation libraries
• USB 3.0 Device IP simulation models
• Configuration assistant GUI (Wizard)
  • Multi-platform JAVA based
• ASIC synthesis scripts (Synopsys Design Compiler)
• Reference design: nand-Flash based Mass Storage Device
  • Synthesizable Verilog RTL source code
  • Simulation environments and scripts
  • Synthesis environments and scripts
• Complete documentation

Available Documentation

Document Name	Version
Product Brief	November 13, 2008
Reference Manual	Contact us